This application claims priority under 35 USC § 119 to Korean Patent Application No. 2006-21955, filed on Mar. 8, 2006 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates generally to chargers such as battery chargers, and more particularly, to a charging controller that maintains a charging voltage to be constant during a constant voltage mode.
2. Background of the Invention
As use of portable electronic devices, such as cellular phones, personal digital assistants (PDAs), portable multimedia players (PMPs), etc., increases, various techniques for charging batteries safely and efficiently are being developed. In portable electronic devices, secondary batteries, which can be re-charged when discharged, such as lithium ion batteries, are used.
FIG. 1 is a circuit diagram of a conventional charging controller for charging a charged device Z which may be a battery. Referring to FIG. 1, the conventional charging controller includes power transistors Mz and Mr and a programmable resistor r. The power transistor Mz is connected between a high voltage supply VDD and the charged device Z for providing a charging current Iz to the charged device Z. The power transistor Mr is connected between the high voltage supply VDD and the resistor r for providing a mirror current Ir to the resistor r. The gates of the power transistors Mr and Mz are connected to a control node Ng.
In addition, the conventional charging controller of FIG. 1 includes a pull-down current source I_down inserted between the control node Ng and a low voltage supply VSS. The conventional charging controller of FIG. 1 also includes a first amplifier A1, a second amplifier A2, a first control transistor Mc, and a second control transistor Mv. The first and second control transistors Mc and Mv are each connected between the high voltage supply VDD and the control node Ng.
The first amplifier A1 amplifies a difference of a first reference voltage V_ref1 and a voltage Vr at the resistor r. The output of the first amplifier A1 is applied on a gate of the first control transistor Mc. The second amplifier A2 amplifies a difference of a second reference voltage V_ref2 and a voltage Vz at the device Z. The output of the second amplifier A2 is applied on a gate of the second control transistor Mv.
The conventional charging controller of FIG. 1 charges the device Z while operating in a constant current mode and a constant voltage mode as shown in FIGS. 2A and 2B, respectively. FIG. 2A is a graph of Iz versus charging time when the charging controller of FIG. 1 operates in the constant current mode. FIG. 2B is a graph of the voltage Vz at the device Z versus charging time when the charging controller of FIG. 1 operates in the constant voltage mode.
The charging controller of FIG. 1 first operates in the constant current mode for charging the device Z that is initially discharged. The voltage Vz at the device Z is lower than the second reference voltage V_ref2 during an initial charging period. Thus, the second amplifier A2 outputs a high level voltage such that the second transistor Mv is turned off during such an initial charging period (i.e., during the constant-current mode).
The level of the mirror current Ir and the level of the charging current Iz may be regulated to be the same or proportional by design of size dimensions of the power transistors Mr and Mz. When the levels of the currents Ir and Iz are so regulated, the voltage Vr corresponds to the level of the charging current Iz. The first amplifier A1 is used for feed-back control of the level of the charging current Iz to be constant (Ic in FIG. 2A) during the constant current mode.
When the charging voltage Vz at the device Z reaches the level of the second reference voltage V_ref2, the constant current mode is ended and the constant voltage mode begins. In that case, the charging current Iz is slowly decreased as shown in FIG. 2A. In the constant voltage mode, the voltage Vr corresponding to the charging current Iz is lower than the first reference voltage V_ref1. Thus, the first amplifier A1 outputs a high level voltage such that the first control transistor Mc is turned off.
The second amplifier A2 is used for feed-back control of the charging voltage Vz to be constant (Vc in FIG. 2B) during the constant voltage mode. That is, the second amplifier A2 controls the turning on and turning off of the second control transistor Mv such that the charging voltage Vz is maintained to the level of the second reference voltage V_ref2. When the charging is finally completed, the charging current Iz is desired to become zero, and the charging voltage Vz is maintained to the level of the second reference voltage V_ref2.
The power transistor Mz should be completely turned off when the charging of the device Z is completed. However, the pull-down current source I_down may discharge the control node Ng such that the voltage at the control node Ng may decrease below that of the high voltage supply VDD. In that case, the charging current Iz may be increased from 0 such that the charging voltage Vz continuously increases even after charging of the device Z is completed. Such increased charging voltage Vz may damage the device Z such that charging is not performed safely.